Adventures in Threading: How TBB is Advancing Parallelism

When it comes to threading techniques, Threading Building Blocks (TBB) has stood the test of time. It’s open, performant, and allows C++ programmers to focus on parallel design instead of parallel implementation.

In addition, few programming techniques are directly comparable.

Watch and listen to expert advice, guidance, and predictions about what’s ahead for threading, including:

  • How addressing issues like composability and task stealing requires an industrial-strength, comprehensive approach … especially as C++ has evolved
  • How advanced capabilities in TBB manage this better for developers
  • How next-gen tools must continue to raise the level of abstraction to harness the power of hardware diversity and heterogeneous computing

Get the software.

TBB is one of five Intel® Performance Libraries. Download free today. 

James Reinders, Engineer and Author

James Reinders is an engineer, parallel programming guru, and tech enthusiast who likes fast computers and the software tools to make them speedy!

He’s spent 30+ years in High Performance Computing (HPC) and Parallel Computing, including 27 years (10,001 days to be precise) at Intel Corporation, and has contributed to many “world’s firsts” including the TeraFLOP/s supercomputer (ASCI Red), the TeraFLOP/s microprocessor (Intel® Xeon Phi™), many Intel® Software Development Tools such as Threading Building Blocks, and new globally coined phrases including “Parallel or Perish” and “Think Parallel.

James is an author of eight technical books (including a new book on TBB and future books on FPGA programming and OpenMP), numerous papers, articles, blogs, and has co-taught many technical classes/workshops/sessions. James earned a Master’s of Science in Electrical Engineering from the University of Michigan, Go Blue!

Henry A. Gabb, PhD, Sr. Principal Engineer, Intel Corporation

Henry is a senior principal engineer in the Intel Software and Services Group, Developer Products Division, and is the editor of The Parallel Universe, Intel’s quarterly magazine for software innovation. He first joined Intel in 2000 to help drive parallel computing inside and outside the company. He transferred to Intel Labs in 2010 to become the program manager for various research programs in academia, including the Universal Parallel Computing Research Centers at the University of California at Berkeley and the University of Illinois at Urbana-Champaign. Prior to joining Intel, Henry was Director of Scientific Computing at the U.S. Army Engineer Research and Development Center MSRC, a Department of Defense high-performance computing facility. Henry holds a B.S. in biochemistry from Louisiana State University, an M.S. in medical informatics from the Northwestern Feinberg School of Medicine, and a PhD in molecular genetics from the University of Alabama at Birmingham School of Medicine. He has published extensively in computational life science and high-performance computing. Henry recently rejoined Intel after spending four years working on a second PhD in information science at the University of Illinois at Urbana-Champaign, where he established an expertise in applied informatics and machine learning for problems in healthcare and chemical exposure.

Performance varies by use, configuration, and other factors. Learn more at www.Intel.com/PerformanceIndex.