Data Parallel C++: An Open Alternative for Cross-Architecture Development

Data Parallelism—aka data parallel compute—is no longer a new thing. It is THE programming model for most compute-intense applications and solutions running on multicore systems, including those that drive AI, machine learning, and video processing.

And according to Intel Senior Fellow Geoff Lowney, it will likely remain the dominant compute pattern for the next 10 years.

The challenge, then, is helping developers express parallelism more easily across the expanse of hardware architectures—CPUs for sure, but also GPUs and FPGAs and VPUs and IPUs and … you get the picture. To do this, a new language is needed.

That language is Data Parallel C++ (DPC++), a key part of Intel’s oneAPI initiative and an extension of familiar C++ that enables new ways to express parallelism for cross-architecture development.

In this 12-minute video, Geoff sits down with Tech.Decoded to discuss DPC++ and what you need to know, including:

  • Does DPC++ require separate host and kernel code?
  • Why use DPC++ for heterogeneous parallelism vs adopting OpenCL™ or CUDA*?
  • Do my legacy C++ programs need updating to take advantage of DPC++? If so, how much?
  • Can I combine DPC++, Threading Building Block, Parallel STL, and OpenMP* in the same program?
  • Will DPC++ features eventually become part of the C++ standard?

Watch.

Get Started Now

  • Visit the Intel® oneAPI beta website to learn about this initiative, including DPC++, free software toolkits, a cloud-based development sandbox, training, industry partners, and more.
  • Try your code in the Intel® DevCloud—Sign up to develop, test, and run your solution in this free development sandbox with access to the latest Intel® hardware and oneAPI software—including DPC++. No downloads. No configuration steps. No installations.
Geoff Lowney, Intel Senior Fellow & CTO for Compute Performance and Developer Products at Intel Corporation

P. Geoffrey Lowney is an Intel Senior Fellow and also serves as chief technology officer for the Compute Performance and Developer Products Division at the company. In his latter capacity, he directs the development of compilers, run-time systems, and programming tools for Intel® platforms.

Prior to joining Intel in 2001, Geoff was a Fellow in microprocessor engineering and design at Compaq Computer Corporation, including serving as the company’s director of compiler and architecture advance development. Additionally, his career has included being a member of the Alpha microprocessor group at Digital Equipment Corporation (DEC), a consulting engineer at HP, leader of the compiler team at Miltiflow Computer, and assistant professor at the Courant Institute of Mathematical Sciences at New York University.

Lowney earned his bachelor’s degree in mathematics from Yale University and his master’s degree and Ph.D. in computer science, also from Yale. He has been granted nearly 20 patents in computer architecture and compiler technology, with additional patents pending.

Henry Gabb, PhD, Sr. Principal Engineer, Intel Corporation

Henry is a senior principal engineer in the Intel Software and Services Group, Developer Products Division, and is the editor of The Parallel Universe, Intel’s quarterly magazine for software innovation. He first joined Intel in 2000 to help drive parallel computing inside and outside the company. He transferred to Intel Labs in 2010 to become the program manager for various research programs in academia, including the Universal Parallel Computing Research Centers at the University of California at Berkeley and the University of Illinois at Urbana-Champaign. Prior to joining Intel, Henry was Director of Scientific Computing at the U.S. Army Engineer Research and Development Center MSRC, a Department of Defense high-performance computing facility. Henry holds a B.S. in biochemistry from Louisiana State University, an M.S. in medical informatics from the Northwestern Feinberg School of Medicine, and a PhD in molecular genetics from the University of Alabama at Birmingham School of Medicine. He has published extensively in computational life science and high-performance computing. Henry recently rejoined Intel after spending four years working on a second PhD in information science at the University of Illinois at Urbana-Champaign, where he established an expertise in applied informatics and machine learning for problems in healthcare and chemical exposure.

Performance varies by use, configuration, and other factors. Learn more at www.Intel.com/PerformanceIndex.