See You at Supercomputing 2020

Connect with Community. Share Collective Insights. Simplify Heterogeneous Programming.

Supercomputing 2020 is right around the corner—a 2-week opportunity to immerse ourselves in tech talks, in-depth workshops, demos, and live chats that focus on our collective efforts to simplify heterogeneous programming through a unified, standards-based model.

Here’s the lineup.


So much has happened since the introduction of the oneAPI industry initiative last November, and it’s been great to see the positive reception from academia and businesses alike. The oneAPI specification supports cross-architecture programming through a language, set of library APIs and a low-level hardware interface, as well as a developer stack. We’re excited to talk about the progress over the last year, and explore what’s next, during a panel discussion moderated by Sujata Tibrewala on November 17. Also beginning that day, you’ll want to watch @IntelDevTools for two presentations with more in-depth insight into oneAPI—oneAPI Platform for Cross-Architecture Programming, and Accelerate Computing to Exascale with the Power of Intel XPUs & oneAPI—as well as a demo. In addition, the Intel eXtreme Performance Computing Users Group (IXPUG) will bring the community together to share early experiences with oneAPI on existing and pre-product GPUs. And if you’re looking for a co-located virtual event dedicated to oneAPI, be sure to join us for the inaugural oneAPI Developer Summit on November 12-13 where Intel Senior Director, Joe Curley, will share his vision around oneAPI, and where the ecosystem will gather to share their experiences with this important cross-industry initiative.

DPC++ and SYCL

At the core of oneAPI is the DPC++ programming language, which builds on the ISO C++ and Khronos SYCL standards. We’ll kick off activities on Monday, November 9, with a couple of great tutorials focused on modern C++ programming. HPC Application Development Using C++ and SYCL helps programmers gain mastery of the SYCL programming language, which targets CPUs, GPUs, FPGAs and other accelerators, while C++ for Heterogeneous Programming (Part I and Part II) offers hands-on programming experience using oneAPI. Join us for a couple of workshops focused on performance portability and productivity, and heterogeneous high-performance reconfigurable computing, to finish up the week. And if you haven’t checked it out yet, be sure to catch the discussion between Tom Deakin and James Brodman about portable, performant programming. Beginning November 17, we invite you to dive into DPC++ programming, and learn how Zuse Institute of Berlin developed a cross-architecture DPC++ application using migrated CUDA stencil code—watch @IntelDevTools for these!

OpenMP and MPI

OpenMP and MPI are foundational for today’s HPC application programmers, and you can find them both in the Intel oneAPI HPC toolkit. Over the next two weeks, we’re looking forward to all of the activities planned around these essential programming tools, beginning with two deep-dive tutorials on November 9-10: The OpenMP Common Core (Part I and Part II), and Advanced OpenMP: Host Performance and 5.0 Features (Part I and Part II). You won’t want to miss the OpenMP Birds of a Feather session on November 17, and beginning the same day, be sure to catch the tech talk that focuses on using OpenMP offload with MPI, which you’ll find on @IntelDevTools. Check out the Exascale MPI workshop on November 13, and the Birds of a Feather session focused on MPI 4.0 on November 18. Dive into a discussion with Mike Lee and Nico Mittenzwey about how the Intel MPI Library is being used to optimize HPC clusters, and look for a spicy conversation about all things OpenMP with Tim Mattson and Bronis de Supinski on November 18 on @IntelDevTools.

Roofline Analysis

The Roofline performance model’s capability to abstract the complexity of memory hierarchies and identify the most profitable optimization techniques have made Roofline-based analysis increasingly popular in the HPC community. Intel Principal Engineer and Software Architect of Intel® Advisor, Dr. Zakhar Matveev, will help lead a great two-day tutorial planned on November 9-10 that will outline the fundamental aspects underlying the different Roofline modeling principles and provide several practical use cases and examples on CPUs and GPUs.

Rendering/Ray Tracing

So many amazing things are happening in scientific visualization, powered by the Intel oneAPI Rendering toolkit, and there’s an incredible lineup of activities, starting with our participation in the In Situ Infrastructures for Enabling Extreme-Scale Analysis and Visualization workshop on November 12.

Developers and users of simulations, visual analysis codes and ray tracers will come together during a SOLAR Consortium workshop on November 18 to advance the standardization of ray tracer interfaces to facilitate their expanding role throughout scientific workflows. On this same day, we’re excited to unveil a short film that features interviews with some of the scientific minds behind DYAMOND++, a project that permits global climate simulations at a resolution of 5km to study a wide range of Earth’s weather and climate phenomena, powered by ParaView and Intel’s OSPRay raytracing backend. Intel Senior Principal Engineer and Director, Jim Jeffers, provides a dive into Moving Towards “Real-Time” Science Analysis and Discovery at Exascale, alongside four demos that give you a front-row view of these breakthrough ray tracing capabilities—look for these on @IntelDevTools beginning November 17.

Live Chats

Jeff Hammond, Henry Gabb, James Tullos and Chris Allison are looking forward to interacting with you, sharing their insights and answering any questions you may have through live chat sessions in the Intel virtual booth on the #SC20 platform on November 17-18 on topics ranging from oneAPI, DPC++, MPI, PGAS, AVX-512, DAOS, and all things HPC.

We look forward to connecting with you, beginning next week!

For more complete information about compiler optimizations, see our Optimization Notice.