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Wednesday, September 18, 2019 9:00 am PDT

Hitting the Roof(line): Should I Optimize for Compute, Memory, or Both?

Optimizing your code for the latest hardware platforms requires 3 pillars: threading, vectorization, and memory. Find out how Roofline Analysis helps you harness this trifecta.

Building and deploying applications that run efficiently on modern hardware is. not. easy. Even the most adroit developers often struggle to understand performance in relation to hardware limitations, including memory bandwidth and computational peaks.

Enter Intel® Advisor’s Roofline Analysis, a feature that lets you visualize actual performance against hardware-imposed performance ceilings (rooflines). This analysis provides developers with an optimization strategy to squeeze maximum performance out of their code with minimal time or effort.

Intrigued? Join Kevin O’Leary—a Senior Software Developer and Technical Consulting Engineer—to get the Intel Advisor details, including:

  • How roofline analysis helps you optimize code for both memory and compute
  • How memory-access analysis helps you eliminate issues that can cause slowdown of vector code
  • Application-specific optimization recommendations
  • A demonstration of Intel Advisor’s capabilities using a real-world particle physics application

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Get the software

  • Intel Advisor – standalone—Download this free version.
  • Intel Advisor as part of Intel® Parallel Studio XE—Sample Intel Advisor with a complementary suite of 10+ additional development tools focused on parallel programming and productivity. Free 30-day trial.
  • Intel Advisor as part of Intel® System Studio—For device manufacturers, integrators, and IoT developers, access Intel Advisor as part of this suite that simplifies system bring-up and speeds IoT application development. Free 1-year renewable license
Kevin O'Leary, Lead Technical Consulting Engineer, Intel Corporation

Kevin O’Leary is a Senior Software Developer and Lead Technical Consulting Engineer whose expertise includes compilers, debuggers, and software performance tools. He’s currently responsible for performance optimization using Intel® Advisor and Intel® VTune™ Amplifier, and was a key developer of Intel® Parallel Studio XE development suite. Prior to joining Intel, Kevin spent many years as a debugger engineer for IBM/Rational Software.

Kevin holds a Bachelor’s in Computer Science from University of Massachusetts and a Master’s in Computer Science from Oregon Health and Science University.

Wednesday, September 25, 2019 9:00 am PDT

Fast System Bring-up And Reliable System Software

Successful platform bring-up requires deep, hardware and software insights—a system-wide analysis of firmware, UEFI BIOS, OS kernels, device drivers, and more. Tune in to discover how Intel® System Debugger streamlines the entire process.

Fast system bring-up can convey a competitive advantage to device manufacturers, system integrators, or IoT software providers. To accelerate the process, platform and system-level problems must be uncovered and corrected quickly.

Intel® System Debugger is designed to help developers do exactly that. With in-depth debugging and tracing capabilities, this tool speeds system bring-up and streamlines development of system software and network applications.

Join Technical Consulting Engineer Johny Paul for a tour of the Intel System Debugger, including:

  • An introduction to its main capabilities such as views of the system state, and the software that is executing and interacting with that state
  • How to quickly analyze complex hardware and software interactions, and use tracing to pinpoint and resolve system issues
  • How to efficiently use source-level debug during any phase of EFI, from reset to OS boot
  • How to debug completely halted Windows* systems using Intel® Debug Extensions for WinDbg*, including early boot, hibernate, drivers, and interrupts

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Get the software

Additional resources

Johny Paul, Technical Consulting Engineer, Intel Corporation

Johny is a Technical Consulting Engineer who specializes in system bring-up and performance analysis, embedded systems, computer vision, and robotics.

His experience includes development of firmware components for motion control on industrial robots used in clinical automation; performance modeling for multi-core processors; and development of hardware accelerators for image processing, face recognition on FPGA, and device drivers for various embedded systems.

Johny holds a PhD from the Technical University of Munich.

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For more complete information about compiler optimizations, see our Optimization Notice.